石油一厂东蒸馏装置的技术改造

介绍抚顺石油化工公司石油一厂东蒸馏装置的改造情况，通过技术改造，使减压蒸馏塔由生产燃料型改造成生产石蜡－润滑油型，满足了该厂对石蜡和润滑油料的质量要求。     

糠醛注水——润滑油糠醛精制装置的节能途径

介绍了用水稀释糠醛使润滑油糠醛精制装置节能的途径。通过注水——糠醛－水溶液（含水９５％左右），可降低糠醛的气化沸点，增大换热系统的传热温差，改善换热效果，更多地回收能量，达到节约能源的目的。     

连续重整装置仿真系统的设计开发

为提高操作人员对连续重整装置开停工及事故处理的熟练程度，并对生产进行指导，采用半机理模型结合设计和现场数据介发的连续重整装置仿真系统已在现场成功投用。介绍了该仿真系统的软硬件结构、动态模型及仿真功能。     

原料扩重的中压加氢改质装置投产

介绍燕山石化公司为扩大1Mt／a中压加氢改质装置的原料来源，改用大庆减二线油和重油催化裂化柴油组成的混合料开工投产的经验以及装置初期的运行条件。中压加氢改质技术可以生产优质柴油和蒸汽裂解制乙烯的原料，还可增产喷气燃料。     

Mechanization techniques for poplar development in Turkey

Annual commercial poplar wood production in Turkey is about 3.6 million cubic meters, half of which comes from hybrid poplar I-214. The poplar plantation areas of Turkey are 70% of the poplar plantation areas of the Near and Middle Eastern countries, and nearly 5% of the world. In this study, unit times of standard operations were investigated in poplar nurseries and plantations in which new mechanical technology was applied and compared with traditional methods. Analyses of unit times were made on 11 treatments for poplar nurseries and nine treatments for poplar plantations; some new methods are also recommended. Mechanization methods based on new technologies give promising results in poplar nurseries and plantations.     

抽油机减速器齿轮的失效分析

找出了人字齿轮减速器在工作中右端齿轮出现严重磨损的原因并进行了分析。提出在国内现有制造技术的条件下，对于37kN·m以下的减速器应推广使用斜齿轮传动。     

矿用扁平接链环静态电测实验及有限元分析

对φ30的矿用扁平接链环进行静态拉伸电测实验，分析并得出产生最大强度的位置。同时应用ANSYS有限元分析软件对接链环的力学简化模型进行分析，与实验结果相比较，有助于找出齿部破坏规律，对齿形的改进及今后的疲劳分析具有重要意义。     

非标准工况下空分设备增产氩的研究与实践

文章对非标准工况下的空分设备增产氩措施进行了研究。以宝钢6#60000m3/h空分设备为例,通过设计型算法和校核型算法,建立了空分设备精馏的数学模型,通过改变数学模型的参数,分析了在非标准工况下精馏塔内的组分浓度分布,并提出了优化后的操作方案和操作参数,实施后提高了空分设备的氩提取率,取得了显著的经济效益。     

堆载预压法加固软基土体稳定性的有限元分析

堆载预压过程中,进行相应的稳定分析对于控制加载速率、确定加载高度是必须进行的一项工作,采用有限单元法对此进行了探讨,详细阐述了有限元理论分析边坡稳定的几种重要因素,并考虑分步堆载的特点,模拟堆载过程,具有一定的工程实际意义。     

Putting it all together – Formal verification of the VAMP

In the verified architecture microprocessor (VAMP) project we have designed, functionally verified, and synthesized a processor with full DLX instruction set, delayed branch, Tomasulo scheduler, maskable nested precise interrupts, pipelined fully IEEE compatible dual precision floating point unit with variable latency, and separate instruction and data caches. The verification has been carried out in the theorem proving system PVS. The processor has been implemented on a Xilinx FPGA. A shorter version of this article with the title “Instantiating uninterpreted functional units and memory system: functional verification of the VAMP” appeared in [8]. The work reported here was done while all the authors were with Saarland University.